The present invention generally relates to semiconductor devices, and more specifically, to nanosheet capacitors.
Nanosheets often include thin layers (sheets) of semiconductor material that are arranged in a stack. A nanosheet stack often includes alternating layers of dissimilar materials. In semiconductor device fabrication, the nanosheets are often patterned into nanosheet fins. Once the fins are patterned, a gate stack is formed over a channel region of the fins, and source/drain regions are formed adjacent to the gate stack.
In some devices, once the gate stack or the source/drain regions have been formed, an etching process is performed to selectively remove nanosheet layers of one of the dissimilar materials from the fins. The etching process results in the undercutting and suspension of the layers of the nanosheet fin to form nanowires. The nanowires can be used to form gate-all-around devices.
Electronic circuits often include capacitive devices. Capacitive devices often include substantially planar electrodes that are arranged in parallel with a dielectric material disposed between the electrodes. Capacitive devices are operative to store a charge and are often included in CMOS circuit designs.